16.14.1 PORTx

PORTx Register
Important:
  • Writes to PORTx are actually written to the corresponding LATx register. Reads from PORTx register return actual I/O pin values.
  • The PORT bit associated with the MCLR pin is read-only and will read ‘1’ when the MCLR function is enabled (LVP = 1 or (LVP = 0 and MCLRE = 1))
  • Refer to the “Pin Allocation Table” for details about MCLR pin and pin availability per port
  • Unimplemented bits will read back as ‘0
Name: PORTx

Bit 76543210 
 Rx7Rx6Rx5Rx4Rx3Rx2Rx1Rx0 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset xxxxxxxx 

Bits 0, 1, 2, 3, 4, 5, 6, 7 – Rxn Port I/O Value

Reset States: 
POR/BOR = xxxxxxxx
All Other Resets = uuuuuuuu
ValueDescription
1

PORT pin is ≥ VIH

0

PORT pin is ≤ VIL

Writes to PORTx are actually written to the corresponding LATx register. Reads from PORTx register return actual I/O pin values. The PORT bit associated with the MCLR pin is read-only and will read ‘1’ when the MCLR function is enabled (LVP = 1 or (LVP = 0 and MCLRE = 1)) Refer to the “Pin Allocation Table” for details about MCLR pin and pin availability per port Unimplemented bits will read back as ‘0’