5 Design Example
For this example, the specifications are:
- PVIN = VIN = 12V
- VOUT = 1.0V
- IOUT = 12A
- FSW = 800 kHz
- COUT = 4 x 47 μF
- CIN = 3 × 22 μF
- Ripple Voltage = ±1% × VOUT
- ΔVOUT(MAX) = ±3% × VOUT (for 50% load transient @ 40 A/μs)
Input Capacitor
The input capacitor chosen for this design must:
- Accommodate the peak and RMS input currents required by the MCPF1412M06
- Possess low equivalent series resistance (ESR) and inductance (ESL) to minimize input voltage ripple
MLCCs (multi-layer ceramic capacitors) are ideal for this purpose. Typically, in an 0805 case size, they can handle 2A RMS current with less than a 5°C temperature rise. For the MCPF1412M06 converter topology operating at duty cycle D and output current IOUT, the RMS value of the input current is:
In this application IOUT is 12A and D is 2 × VOUT/VIN (aggregate duty for a 2 phase converter) or 0.167. Thus, the input capacitor IRMS is 2.23A, and we can choose three 22 μF 25V ceramic capacitors for the input capacitors (C2012X5R1E226M125AC from TDK). If the MCPF1412M06 is not positioned near the 12V power supply, an additional bulk capacitor (68–330 μF) may be used alongside the ceramic capacitors.
For VIN, which serves as the input to the LDO, it is recommended to place a 1 μF capacitor very close to the pin. The VIN pin should be connected to PVIN via a 2.7Ω resistor and a 1 μF capacitor at the PVIN pin, to help filter noise on PVIN.
Output Voltage and Output Capacitor
The MCPF1412M06 is factory-calibrated to deliver a 0.6V output in a closed-loop configuration. When opting for a resistor divider instead of using I2C/PMBus™, as illustrated in the application example, resistor values should be selected based on the guidelines provided in Section 2.5. Consequently, RTOP is set to 4.12 kΩ, RBOTTOM to 5.9 kΩ, and CFF to 220 pF. The design necessitates minimal output capacitance to achieve the desired output voltage ripple and maximum output voltage deviation during load transients. For the MCPF1412M06, the minimum number of output capacitors needed to meet the target peak-to-peak VOUT ripple is:
Where:
- NMIN is the minimum number of output capacitors required
- C is the equivalent capacitance of each capacitor
- FSW is the switching frequency
- ESR is the equivalent series resistance of each output capacitor
- ELS is the equivalent series inductance of each capacitor
- ΔVOUTripple(p-p) is the maximum peak to peak output ripple allowed
This design uses the TDK C2012X5R0J476M125AC, a 47 μF MLCC with an 0805 case size and a 6.3V rating. Considering DC bias and AC ripple derating at 1.0V, its equivalent capacitance is 33 μF. The equivalent series resistance (ESR) is 3 mΩ, and the equivalent series inductance (ESL) is 0.44 nH. Using these parameters in the equation results in:
NMIN = 2.27
To achieve the maximum voltage deviation ΔVOmax during a ΔIO load transient, the minimum number of output capacitors needed is:
Where:
- ΔI is the load step
- ΔVOmax is the maximum voltage deviation allowed
- FSW is the switching frequency
- C is the capacitance of each capacitor
Using a capacitance of 33 μF, it is determined that a minimum of 2.22 output capacitors are needed. For our design, which is intended for space-constrained applications, we have chosen to use four C2012X5R0J476M125AC capacitors.
It is important to note that the calculation for the minimum number of output capacitors under a load transient is based on several assumptions:
- No Equivalent Series Resistance (ESR) or Equivalent Series Inductance (ESL) – (a)
- The converter can instantly saturate its duty cycle – (b)
- No latency – (c)
- Step load with an infinite slew rate – (d)
Assumptions (a), (b), and (c) are optimistic, while assumption (d) is conservative. Therefore, in practical applications, additional capacitance may be necessary to meet transient requirements, and this should be carefully evaluated by the system designer.
Even without a specified target VOUT ripple or maximum voltage deviation under load transient, a minimum of one 22 μF capacitor is necessary to ensure stable operation without excessive jitter. Up to eight 47 μF capacitors can be used in the design. If additional capacitance is needed, it is advisable to use a high-value capacitor with a relatively high ESR (>3 mΩ).
VCC and PVCC Capacitors
The MCPF1412M06 incorporates on-package capacitors for both VCC and PVCC to ensure efficient high-frequency bypassing. However, for applications utilizing an external VCC supply, it is advisable for system designers to place 2.2 μF/0603/X7R/10V capacitors on the application board as close as possible to the VCC and PVCC pins (see Figure 5-1).
| CIN1 | 68 μF, 25V (optional) |
| CIN2 | 2 x 22 μF, 16V, 0805, X5R |
| CVCC | 2.2 μF, 10V, 0603, X5R (optional) |
| CPVCC | 2.2 μF, 10V, 0603, X5R (optional) |
| CFF | 220 pF |
| RTOP | 4.12 kΩ |
| RBOT | 5.9 kΩ |
| COUT | 4 x 47 μF, 6.3V, 0805, X5R |
