The Configurable Custom Logic (CCL) is a programmable logic peripheral which can be connected to the device pins, to events, or to other internal peripherals. This allows the user to eliminate logic gates for simple glue logic functions on the PCB and logic operations can be performed using Programmable Lookup Tables (LUT) and sequential logic without CPU intervention.
Each LUT consists of three individually configurable inputs and a truth table, in addition to the optional filter, synchronizer, and edge detector. Inputs can either be I/O pins, internal feedback, peripherals, or events from the Event System. Each LUT can generate an output as a user programmable logic expression from the three inputs. Two adjacent LUTs are connected to a sequential logic block, forming a unit. The optional sequential logic can be enabled for complex waveform generation such as JK flip-flop, RS latch, D latch, or gated D flip-flop. The output can be routed to I/O pins, peripherals, event system, or as feedback to the corresponding unit.
CCL Configurator supports end-to-end configuration of the CCL module graphically.
The following application demonstrates the use of internal peripherals and I/O pins as inputs to the CCL. The CCL uses the LUTs and sequential modules to generate the output based on the inputs. The example application below detects motion in low-light condition and provides the output signal to a pin. The signal will be available in that pin until a switch is pressed to turn off the signal.
AND is represented using ‘*’. If an operator is not specified, AND (*) is assumed
OR is represented using ‘+’
XOR is represented using ‘^’
NOT is represented using ‘!’
NAND can be created by using the expression - !(a*b). If an operator is not specified, NAND !(*) is assumed
NOR can be created by using the expression - !(a+b)
XNOR can be created by using the expression - !(a^b)
Complex combinational logic can be created using an expression that involves the operators listed above. Brackets can be used to control the precedence of operators by grouping the part of an expression. E.g. - a+((b^c)*(!c))
The VALUE column in the truth table will be enabled to set individual bits.
"Custom" should be elected in gate type for using option 7.2 and 7.3. The Truth table will automatically be updated based on the option selected.
The Configurator will be updated automatically to show these connections.
Redirect the JK flip-flop output to pin PB4.