LUT n Control B

Notes:
  1. 1.SPI connections to the CCL work in Host SPI mode only.
  2. 2.USART connections to the CCL work only when the USART is in one of the following modes:
    • Asynchronous USART
    • Synchronous USART Host
Name:
LUTnCTRLB
Offset:
0x06 + n*0x04 [n=0..1]
Reset:
0x00
Access:
Enable-Protected
Bit76543210
INSEL1[3:0]INSEL0[3:0]
AccessR/WR/WR/WR/WR/WR/WR/WR/W
Reset00000000

Bits 7:4 – INSEL1[3:0]: LUT n Input 1 Source Selection

LUT n Input 1 Source Selection

This bit field selects the source for input 1 of LUT n.

Value Name Description
0x0 MASK Masked input
0x1 FEEDBACK Feedback input
0x2 LINK Linked other LUT as input source
0x3 EVENT0 Event input source 0
0x4 EVENT1 Event input source 1
0x5 IO I/O-pin LUTn-IN1 input source
0x6 AC0 AC0 OUT input source
0x7 TCB0 TCB0 WO input source
0x8 TCA0 TCA0 WO1 input source
0x9 TCD0 TCD0 WOB input source
0xA USART0 USART0 TXD input source
0xB SPI0 SPI0 MOSI input source
Other - Reserved

Bits 3:0 – INSEL0[3:0]: LUT n Input 0 Source Selection

LUT n Input 0 Source Selection

This bit field selects the source for input 0 of LUT n.

Value Name Description
0x0 MASK Masked input
0x1 FEEDBACK Feedback input
0x2 LINK Linked other LUT as input source
0x3 EVENT0 Event input source 0
0x4 EVENT1 Event input source 1
0x5 IO I/O-pin LUTn-IN0 input source
0x6 AC0 AC0 OUT input source
0x7 TCB0 TCB0 WO input source
0x8 TCA0 TCA0 WO0 input source
0x9 TCD0 TCD0 WOA input source
0xA USART0 USART0 XCK input source
0xB SPI0 SPI0 SCK input source
Other - Reserved