An ideal n-bit single-ended ADC converts a voltage linearly between GND and VREF in 2n steps (LSb). The lowest code is read as ‘0’, and the highest code is read as ‘2n-1’. Several parameters describe the deviation from the ideal behavior:
Offset Error
The deviation of the first transition (0x000 to 0x001) compared to the ideal transition (at 0.5 LSb). Ideal value: 0 LSb.
Figure 1. Offset Error
Gain Error
After adjusting for offset, the gain error is found as the deviation of the last transition (e.g., 0x3FE to 0x3FF for a 10-bit ADC) compared to the ideal transition (at 1.5 LSb below maximum). Ideal value: 0 LSb.
Figure 2. Gain Error
Integral Nonlinearity (INL)
After adjusting for offset and gain error, the INL is the maximum deviation of an actual transition compared to an ideal transition for any code. Ideal value: 0 LSb.
Figure 3. Integral Nonlinearity
Differential Nonlinearity (DNL)
The maximum deviation of the actual code width (the interval between two adjacent transitions) from the ideal code width (1 LSb). Ideal value: 0 LSb.
Figure 4. Differential Nonlinearity
Quantization Error
Due to the quantization of the input voltage into a finite number of codes, a range of input voltages (1 LSb wide) will code to the same value. Always ±0.5 LSb.
Absolute Accuracy
The maximum deviation of an actual (unadjusted) transition compared to an ideal transition for any code. This is the compound effect of all errors mentioned before. Ideal value: ±0.5 LSb.