VDD = 3V, unless stated otherwise.
Accuracy characteristics calculated based on 5% to 95% range of the DAC.
Table 1. Power Supply, Reference, and Input
Range
| Symbol |
Description |
Min. |
Typ. |
Max. |
Unit |
| VDD |
Supply voltage(1) |
1.8 |
3 |
5.5 |
V |
| RLoad |
Resistive external load |
5 |
- |
- |
kΩ |
| CLoad |
Capacitive external load |
- |
- |
30 |
pF |
| VOUT |
Output voltage range |
0.2 |
- |
VDD-0.2 |
V |
| IOUT |
Output sink/source |
- |
1 |
- |
mA |
Note: 1. The supply voltage must meet the
VDD specification for the VREF level used as DAC
reference.
Table 2. Clock and Timing
Characteristics
| Symbol |
Description |
Conditions |
Min. |
Typ. |
Max. |
Unit |
| fDAC |
Maximum conversion rate |
0.55V ≤ VREF ≤ 2.5V |
- |
350 |
- |
ksps |
| VREF = 4.3V |
- |
270 |
- |
ksps |
Table 3. Accuracy Characteristics(3)
| Symbol |
Description |
Conditions |
Min. |
Typ. |
Max. |
Unit |
| RES |
Resolution |
|
- |
|
8 |
bits |
| INL |
Integral nonlinearity |
0.55V ≤ VREF ≤ 4.3V |
-1.2 |
0.3 |
1.2 |
LSb |
| DNL |
Differential nonlinearity |
0.55V ≤ VREF ≤ 4.3V |
-1 |
0.25 |
1 |
LSb |
| EOFF(1) |
Offset error |
0.55V ≤ VREF ≤ 1.5V |
-25 |
-3 |
20 |
mV |
| VREF = 2.5V |
-30 |
-6 |
10 |
| VREF = 4.3V |
-40 |
-10 |
0 |
| EGAIN(2) |
Gain error |
VREF = 1.1V, VDD = 3.0V, T =
25°C |
- |
±1 |
- |
LSb |
| 0.55V ≤ VREF ≤ 4.3V |
-10 |
-1 |
10 |
Notes:
- 1.Offset including the DAC output
buffer offset, this measured at DAC output pin.
- 2.VREF accuracy is included in the Gain accuracy specification.
- 3.These values are based on characterization and not covered by production test
limits.