Control A

Name:
CTRLA
Offset:
0x00
Reset:
0x00
Access:
-
 Bit7 6 5 4 3 2 1 0 RUNSTBY RESSEL FREERUN ENABLE AccessR/W R/W R/W R/W Reset0 0 0 0

## Bit 7 – RUNSTBY: Run in Standby

Run in Standby

This bit determines whether the ADC needs to run when the chip is in Standby sleep mode.

## Bit 2 – RESSEL: Resolution Selection

Resolution Selection

This bit selects the ADC resolution.

ValueDescription
0 Full 10-bit resolution. The 10-bit ADC results are accumulated or stored in the ADC Result (ADCn.RES) register.
1 8-bit resolution. The conversion results are truncated to eight bits (MSbs) before they are accumulated or stored in the ADC Result (ADCn.RES) register. The two Least Significant bits (LSbs) are discarded.

## Bit 1 – FREERUN: Free-Running

Free-Running

Writing a ‘1’ to this bit will enable the Free-Running mode for the data acquisition. The first conversion is started by writing the STCONV bit in the ADCn.COMMAND high. In the Free-Running mode, a new conversion cycle is started immediately after or as soon as the previous conversion cycle has been completed. This is signaled by the RESRDY flag in the ADCn.INTFLAGS register.