Block Diagram - CLKCTRL

Figure 1. CLKCTRL Block Diagram
Note: The availability of the TOSC1, TOSC2 and the CLKOUT pin depends on the pin count of the device. See section I/O Multiplexing and Considerations for an overview of which pins are available for each device represented in this data sheet.
The clock system consists of the Main Clock and other asynchronous clocks:

The clock source for the Main Clock domain is configured by writing to the Clock Select (CLKSEL) bits in the Main Clock Control A (CLKCTRL.MCLKCTRLA) register. The asynchronous clock sources are configured by registers in the respective peripheral.