47.6.8 User Data Bit

The user data bits of channel 1 are stored in the Channel 1 User Data register (SPDIFRX_CH1UDx[x=0..5]), a 192-bit register that can be read directly from the user interface. The user data bits of channel 2 are stored in the Channel 2 User Data register (SPDIFRX_CH2UDx[x=0..5]). All 192 bits are valid when the block end status flag rises (SPDIFRX_ISR.BLOCKEND).

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