74.6.6.3 FLEXCOM TWI Characteristics

The TWI communicates in Standard, Fast, Fast Mode Plus and High-Speed (HS) modes subject to the following:

When the registers FLEX_TWI_CWGR, FLEX_TWI_HSCWGR and FLEX_TWI_MMR are programmed in the TWI Controller
Pull-ups (Rp) are computed to achieve the required rise time according to the total Cbus capacitance.

Possible limitations are given in the table and figures below.

Table 74-31. Two-Wire Interface I/O Characteristics
Symbol	Parameter	Conditions	Min	Unit
V_{IL ,}V_IH	Low-level/High-level Input voltage	All modes	See note ⁽¹⁾	V
V_{OL ,}V_OH	Low-level/High-level Output voltage	All modes	See note ⁽²⁾	V
I_OL	Low-level Output Current	Standard Fast Fast-Mode Plus	See notes ⁽²⁾⁽³⁾	mA
I_OL	Low-level Output Current	High-speed Mode	See note ⁽²⁾	mA
t_f	Output fall time of both TWD and TWCK signals V_IHmin to V_ILmax	Standard Fast Fast-Mode Plus	See note ⁽⁴⁾	ns
t_fTWCK,t_fTWD	Fall time of both TWD and TWCK signals	High-speed Mode	See note ⁽⁴⁾	ns
t_rTWCK	Rise time of TWCK, rise boost mode (push-pull mode)	SCLRBL > 0	See note ⁽⁵⁾	ns

Note:

See the table Input DC Characteristics.
See the tables Output DC Characteristics (1.7V < VDD < 1.9V) and Output DC Characteristics (3.0V < VDD < 3.6V). If R_p(min) as specified in the I2C specification must be overridden (stronger) to meet the timing specification, the IBIS model of the product can be used to extract V_OL(max) vs I_OL
20 mA is not supported for Fast Mode Plus.
Fall time of FLEXCOM I/O buffers are not I2C-compliant. Fall time can be increased by adding series resistors (see series protection resistors in the I2C specification). Rs < 1 KΩ depending on Cbus and Rp to respect V_OL,V_IL on the bus. Use Drive disabled (set to 0) and Slew rate enabled (set to 1) on the corresponding I/O. In the I/O AC Characteristics section, see falling times given for a 10 pF load. IBIS models of the product can be used to choose an adequate Rs value by simulating different drive/slew rate combinations with respect to the Cbus load.
When in High-speed mode, the TWI Clock signal (TWCK) rise can be boosted to meet a very fast rise time of the parameter t_rCL of the I2C specification when the Rp value on TWCK is lower than R_p(min).
Bits in FLEX_TWI_MMR.SCLRBL must be programmed according to t_MCK1 to respect these timings. This gives the number of peripheral clock periods during which the SCL rise is boosted, i.e. driven in Push-pull mode. Note that the Cbus value and the drive and slew rate settings still influence the rise time. Rise boost usage is more suited with high Cbus values.

Figure 74-24. TWCK High-Speed Mode with Rise Boost Enabled

The figure below shows programmable register fields (CLDIV/HSCLDIV, CHDIV/HSCHDIV and optional CKDIV/HSCKDIV) in relation to t_LOW, t_HIGH, t_r, t_f, f_SCL, t_rCL, t_rCL1, t_fCL from the I2C specification.

Figure 74-25. TWCK Timings Characteristics

Note: Symbols with an asterisk (*) are I2C specification symbols: t_LOW, t_HIGH, t_r, t_f.

Note: For High-speed mode, t_r = t_rCLor t_rCL1 and t_f = t_fCL from the I2C specification.

Important: t_SCL≅ t_LOW(min)+ t_r(max)+ t_HIGH(min) + t_f(max)