20.5.8.1 Integrated Signal Conditioning
The SCLx and SDAx pins have an input glitch filter. The I2C bus requires this filter in both the 100 kHz and 400 kHz systems.
When operating on a 400 kHz bus, the I2C bus specification requires a slew rate control of the device pin output. This slew rate control is integrated into the device. If the DISSLW bit (I2CxCON1[9]) is cleared, the slew rate control is active. For other bus speeds, the I2C bus specification does not require slew rate control and the DISSLW bit should be set.
Some system implementations of I2C buses require different input levels for VILMAX and VIHMIN. In a normal I2C system, VILMAX is 0.3 VDD and VIHMIN is 0.7 VDD. By contrast, in a SMBus system, VILMAX is set at 0.8V while VIHMIN is set at 2.1V.
The SMBEN bit (I2CxCON1[25:24]) controls the input levels. Setting SMBEN
(= 1
) changes the input levels to SMBus
specifications.