13.6.2.2 Bus Read Error

The DMA module responds to read and write errors on the bus. A bus read error Fault occurs when the data read by the DMA are invalid. This might occur, for example, under the following conditions:

The read was not allowed because of the device security settings
The read was attempted at an unimplemented address

When a bus read error occurs, the BRERR (DMAxSTAT[8]) bit is set so that user software can detect the read error. When a bus read error occurs, the DMA channel can optionally suspend operation based on the setting of the Read Error Trap Enable bit, RETEN (DMAxCH[16]). When the RETEN bit is cleared (default), the DMA channel will continue operation when a bus read error is encountered. The data obtained from the bus read will be transferred to the write destination by the DMA channel. When the RETEN bit is set, the DMA channel will suspend operation and the DMA trap will be asserted.

The RETEN control bit allows the user to make a trade-off between time-sensitive data streaming applications and applications where the data must be accurate. For example, an audio streaming application may be able to tolerate an occasional data error even if it produces audible artifacts. In contrast, a data error in a closed-loop control system could have more severe consequences, and it would be safer to suspend DMA transfers until the cause of the data error has been resolved.