10.10.2 Global Interrupt Disable

A Global Interrupt Enable bit (GIE) is used to enable or disable all interrupts globally. When the GIE bit is cleared, it causes the interrupt controller to behave as if the CPU’s SR.IPL bits are set to seven and disables all interrupts except the traps. When the GIE bit is set again, the interrupt controller acts based on the actual value of SR.IPL; the system will return to the previous operating state, depending on the prior interrupt priority bit settings.

Additionally, individual interrupts can also be disabled by not setting corresponding enable bit in the IEC register or by configuring its priority level to 0.