10.3 Interrupt Vector Table

The IVT resides in the program memory. The IVT contains interrupt vectors plus six processor trap vectors. In general, each interrupt source has its own vector. Each interrupt vector contains a 24-bit wide address. The value programmed into each interrupt vector location is the starting address of the associated Interrupt Service Routine (ISR). See Table 10-1 for interrupt vector details.

The processor core is responsible for reading of the IVT and transferring the address contained in the interrupt vector to the program counter. The interrupt vector is transferred from the program data bus into the program counter.

The peripheral Interrupt Vector Table (IVT) can be dynamically relocated using the IVT Base Register (IVTBASE). Upon a device Reset, the default base address is set to "0x800000". Program execution commences at the address indicated by the Reset vector, which is situated at 0x800000. The IVT is shown in Figure 10-1.