Table 19-1. SPI Summary Table| SPI Module Instances | Max Clock Frequency | Peripheral Bus Speed | Clock Source |
|---|
| 3 | See Electrical
Characteristics | Standard | See Table 19-2 |
Table 19-2. SPI Host Clock Source
Selection bit| Value | Description |
|---|
1 | CLKGEN9 |
0 | Standard Speed Peripheral Clock |
Table 19-3. SPI FIFO Depth| Setting | Size |
|---|
| Default | 4-bytes |
| |
|
Note: 32-bit data equates to a buffer depth of
X/4 = 1.
|
Note: All devices in the dsPIC33AK128MMC106 family include three
SPI modules. On 64-pin devices, the SPI instance SPI2 can operate at maximum speed
when dedicated pins are selected. The selection is done using the SPI2PIN bit
(FDEVOPT[13]). If the bit for SPI2PIN is ‘1’, the PPS pin will be used. When SPI2PIN
is ‘0’, the SPI signals are routed to dedicated pins.
