55.27 I²C Electrical Specifications

Figure 55-8. I²C Start/Stop Bits Host Mode Timing Diagrams

Figure 55-9. I²C Bus Data Host Mode Timing Diagrams

Table 55-38. I²C Host Mode Electrical Specifications
AC CHARACTERISTICS				Standard Operating Conditions: VDD = AVDD = 1.71V to 3.63V (unless otherwise stated) Operating temperature: -40°C ≤ T_A ≤ +85°C for Industrial Temperature
Param. No.	Symbol	Characteristics		Min.	Max.	Units	Conditions
I2CM_1	TLO:SCL	Host Clock Low Time	100 kHz mode	4.7	—	µs	VDD = 3.3V, IPULLUP = 3mA, C_LOAD = 400pF
			400 kHz mode	1.3	—	µs	VDD = 3.3V, IPULLUP = 3mA, C_LOAD = 400pF
			1 MHz mode	0.5	—	µs	VDD = 3.3V, IPULLUP = 20mA, C_LOAD= 550pF
			3.4 MHz mode	160	—	ns	VDD = 3.3V, IPULLUP = 20 mA, C_LOAD= 100 pF
I2CM_3	THI:SCL	Host Clock High Time	100 kHz mode	4.0	—	µs	VDD = 3.3V, IPULLUP = 3mA, C_LOAD = 400 pF
			400 kHz mode	0.6	—	µs	VDD = 3.3V, IPULLUP = 3mA, C_LOAD = 400 pF
			1 MHz mode	0.26	—	µs	VDD = 3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	60	—	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
I2CM_5	TF:SCL	SDAx and SCLx Fall Time	100 kHz mode	—	300	ns	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			400 kHz mode	—	300	ns	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			1 MHz mode	—	120	ns	VDD=3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	—	40	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
I2CM_7	TR:SCL	SDAx and SCLx Rise Time	100 kHz mode	—	1000	ns	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			400 kHz mode	—	300	ns	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			1 MHz mode	—	120	ns	VDD=3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	—	40	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
I2CM_9	TSU:DAT	Data Setup Time	100 kHz mode	250	—	ns	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			400 kHz mode	100	—	ns	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			1 MHz mode	50	—	ns	VDD=3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	10	—	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
I2CM_11	THD:DAT	Data Hold Time⁽¹⁾	100 kHz mode	300	—	ns	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			400 kHz mode	300	—	ns	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			1 MHz mode	300	—	ns	VDD=3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	5	—	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
I2CM_13	TSU:STA	Start Condition Setup Time	100 kHz mode	4.7	—	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			400 kHz mode	0.6	—	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			1 MHz mode	0.26	—	µs	VDD=3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	160	—	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
I2CM_15	THD:STA	Start Condition Hold Time	100 kHz mode	4.0	—	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			400 kHz mode	0.6	—	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			1 MHz mode	0.26	—	µs	VDD=3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	160	—	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
I2CM_17	TSU:ST0	Stop Condition Setup Time	100 kHz mode	4.0	—	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			400 kHz mode	0.6	—	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			1 MHz mode	0.26	—	µs	VDD=3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	160	—	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
I2CM_21	TAA:SCL	Output Valid from Clock	100 kHz mode	—	3.45	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			400 kHz mode	—	0.9	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			1 MHz mode	—	0.45	µs	VDD=3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	—	100	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
I2CM_23	TBF:SDA	Bus Free Time ⁽²⁾	100 kHz mode	4.7	—	µs	VDD=3.3V, IPULLUP= 3mA, C_LOAD=200pF
			400 kHz mode	1.3	—	µs	VDD=3.3V, IPULLUP= 3mA, C_LOAD=200pF
			1 MHz mode	0.5	—	µs	VDD=3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	160	—	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
Note: Longest delay between data hold timing based on bitfield SDAHOLD of register CTRLA from SERCOM Module and timing based on 4 period of GCLK_SERCOM for 100kHz/400kHz/1MHz mode. The amount of time the bus must be free before a new transmission can start (STOP condition to START condition).

Figure 55-10. I²C Start/Stop Bits Client Mode Timing Diagrams

Figure 55-11. I²C Bus Data Client Mode Timing Diagrams

Table 55-39. I²C Client Mode Electrical Specifications
AC CHARACTERISTICS				Standard Operating Conditions: VDD = AVDD = 1.71V to 3.63V (unless otherwise stated) Operating temperature: -40°C ≤ T_A ≤ +85°C for Industrial Temperature
Param. No.	Symbol	Characteristics		Min.	Max.	Units	Conditions
I2CS_1	TLO:SCL	Client Clock Low Time	100 kHz mode	4.7	—	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			400 kHz mode	1.3	—	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			1 MHz mode	0.5	—	µs	VDD=3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	160	—	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
I2CS_3	THI:SCL	Client Clock High Time	100 kHz mode	4.0	—	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			400 kHz mode	0.6	—	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			1 MHz mode	0.26	—	µs	VDD=3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	60	—	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
I2CS_5	TF:SCL	SDAx and SCLx Fall Time	100 kHz mode	—	300	ns	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			400 kHz mode	—	300	ns	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			1 MHz mode	—	120	ns	VDD=3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	—	40	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
I2CS_7	TR:SCL	SDAx and SCLx Rise Time	100 kHz mode	—	1000	ns	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			400 kHz mode	—	300	ns	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			1 MHz mode	—	120	ns	VDD=3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	—	40	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
I2CS_9	TSU:DAT	Data Setup Time	100 kHz mode	250	—	ns	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			400 kHz mode	100	—	ns	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			1 MHz mode	50	—	ns	VDD=3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	10	—	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
I2CS_11	THD:DAT	Data Hold Time ⁽¹⁾	100 kHz mode	300	—	ns	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			400 kHz mode	300	—	ns	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			1 MHz mode	300	—	ns	VDD=3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	5	—	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
I2CS_13	TSU:STA	Start Condition Setup Time	100 kHz mode	4.7	—	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			400 kHz mode	0.6	—	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			1 MHz mode	0.26	—	µs	VDD=3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	160	—	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
I2CS_15	THD:STA	Start Condition Hold Time	100 kHz mode	4.0	—	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			400 kHz mode	0.6	—	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			1 MHz mode	0.26	—	µs	VDD=3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	160	—	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
I2CS_17	TSU:ST0	Stop Condition Setup Time	100 kHz mode	4.0	—	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			400 kHz mode	0.6	—	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			1 MHz mode	0.26	—	µs	VDD=3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	160	—	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
I2CS_21	TAA:SCL	Output Valid from Clock	100 kHz mode	—	3.45	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			400 kHz mode	—	0.9	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			1 MHz mode	—	0.45	µs	VDD=3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	—	100	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
I2CS_23	TBF:SDA	Bus Free Time ⁽²⁾	100 kHz mode	4.7	—	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			400 kHz mode	1.3	—	µs	VDD=3.3V, IPULLUP = 3mA, C_LOAD=400pF
			1 MHz mode	0.5	—	µs	VDD=3.3V, IPULLUP = 20mA, C_LOAD=550pF
			3.4 MHz mode	160	—	ns	VDD=3.3V, IPULLUP =20mA, C_LOAD=100pF
Note: Longest delay between data hold timing based on the SDAHOLD bitfield of the CTRLA register from SERCOM module and timing based on 4 period of GCLK_SERCOM for 100 kHz/400 kHz/1 MHz mode. The amount of time the bus must be free before a new transmission can start (STOP condition to START condition).

PIC32CX SG41/SG60/SG61 Family Data Sheet

55.27 I2C Electrical Specifications

55.27 I²C Electrical Specifications