12.6.9 Peripheral Interrupt Flag Status - Bridge D

These flags are set when a Peripheral Access Error occurs while accessing the peripheral associated with the respective INTFLAGx bit, and will generate an interrupt request if INTENCLR/SET.ERR is '1'.

Writing a '0' to these bits has no effect.

Writing a '1' to these bits will clear the corresponding INTFLAGx interrupt flag.

Name:	INTFLAGD
Offset:	0x20
Reset:	0x00000000
Property:	–


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16

Access
Reset


Bit	15	14	13	12	11	10	9	8
					PCC	I2S	DAC	ADC1
Access					RW	RW	RW	RW
Reset					0	0	0	0


Bit	7	6	5	4	3	2	1	0
	ADC0	TC7	TC6	TCC4	SERCOM7	SERCOM6	SERCOM5	SERCOM4
Access	RW	RW	RW	RW	RW	RW	RW	RW
Reset	0	0	0	0	0	0	0	0

Bit 11 – PCC Interrupt Flag for PCC

This flag is set when a Peripheral Access Error occurs while accessing the PCC, and will generate an interrupt request if INTENCLR/SET.ERR is '1'.

Writing a '0' to these bits has no effect.

Writing a '1' to these bits will clear the PCC interrupt flag.

Bit 10 – I2S Interrupt Flag for I2S

This flag is set when a Peripheral Access Error occurs while accessing the I2S, and will generate an interrupt request if INTENCLR/SET.ERR is '1'.

Writing a '0' to these bits has no effect.

Writing a '1' to these bits will clear the I2S interrupt flag.

Bit 9 – DAC Interrupt Flag for DAC

This flag is set when a Peripheral Access Error occurs while accessing the DAC, and will generate an interrupt request if INTENCLR/SET.ERR is '1'.

Writing a '0' to these bits has no effect.

Writing a '1' to these bits will clear the DAC interrupt flag.

Bit 8 – ADC1 Interrupt Flag for ADC1

This flag is set when a Peripheral Access Error occurs while accessing the ADC1, and will generate an interrupt request if INTENCLR/SET.ERR is '1'.

Writing a '0' to these bits has no effect.

Writing a '1' to these bits will clear the ADC1 interrupt flag.

Bit 7 – ADC0 Interrupt Flag for ADC0

This flag is set when a Peripheral Access Error occurs while accessing the ADC0, and will generate an interrupt request if INTENCLR/SET.ERR is '1'.

Writing a '0' to these bits has no effect.

Writing a '1' to these bits will clear the ADC0 interrupt flag.

Bit 6 – TC7 Interrupt Flag for TC7

This flag is set when a Peripheral Access Error occurs while accessing the TC6, and will generate an interrupt request if INTENCLR/SET.ERR is '1'.

Writing a '0' to these bits has no effect.

Writing a '1' to these bits will clear the TC7 interrupt flag.

Bit 5 – TC6 Interrupt Flag for TC6

This flag is set when a Peripheral Access Error occurs while accessing the TC6, and will generate an interrupt request if INTENCLR/SET.ERR is '1'.

Writing a '0' to these bits has no effect.

Writing a '1' to these bits will clear the TC6 interrupt flag.

Bit 4 – TCC4 Interrupt Flag for TCC4

This flag is set when a Peripheral Access Error occurs while accessing the TCC4, and will generate an interrupt request if INTENCLR/SET.ERR is '1'.

Writing a '0' to these bits has no effect.

Writing a '1' to these bits will clear the TCC4 interrupt flag.

Bit 3 – SERCOM7 Interrupt Flag for SERCOM7

This flag is set when a Peripheral Access Error occurs while accessing the SERCOM7, and will generate an interrupt request if INTENCLR/SET.ERR is '1'.

Writing a '0' to these bits has no effect.

Writing a '1' to these bits will clear the SERCOM7 interrupt flag.

Bit 2 – SERCOM6 Interrupt Flag for SERCOM6

This flag is set when a Peripheral Access Error occurs while accessing the SERCOM6, and will generate an interrupt request if INTENCLR/SET.ERR is '1'.

Writing a '0' to these bits has no effect.

Writing a '1' to these bits will clear the SERCOM6 interrupt flag.

Bit 1 – SERCOM5 Interrupt Flag for SERCOM5

This flag is set when a Peripheral Access Error occurs while accessing the SERCOM5, and will generate an interrupt request if INTENCLR/SET.ERR is '1'.

Writing a '0' to these bits has no effect.

Writing a '1' to these bits will clear the SERCOM5 interrupt flag.

Bit 0 – SERCOM4 Interrupt Flag for SERCOM4

This flag is set when a Peripheral Access Error occurs while accessing the SERCOM4, and will generate an interrupt request if INTENCLR/SET.ERR is '1'.

Writing a '0' to these bits has no effect.

Writing a '1' to these bits will clear the SERCOM4 interrupt flag.