3.11.7 sEEPromWDTimer eepWdtConf

The sEEPromWDTimer eepWdtConf variable contains the setting for the watchdog timer configuration.

confT0CR

The confT0CR variable is a copy of the timer0 control register (T0CR). The variable is copied to the hardware register during system initialization but not further supported by the firmware. For more details on the hardware description, see Timer0 – Watchdog/Interval Timer from Related Links.

Bits 7..5: Reserved Bits

These bits are reserved for future use and must be set to ‘0’.

Bit 4: T0PR – Timer0 Prescaler Reset

Bit 3: T0IE – Timer0 Interrupt Enable

Bits 2..0: T0PS[2:0] – Timer0 Prescaler Selection

confT0IFR

The confT0IFR variable is a copy of the timer0 interrupt flag register (T0IFR). The variable is copied to the hardware register during system initialization but not further supported by the firmware. For more details on the hardware description, see Timer0 – Watchdog/Interval Timer from Related Links.

Bits 7..1: Reserved Bits

These bits are reserved for future use and must be set to ‘0’.

Bit 0: T0F – Timer0 Flag

confWDTCR

The confWDTCR variable is a copy of the watchdog timer control register (WDTCR). For more details on the functional description, see Watchdog Configuration from Related Links. For more details on the hardware description, see Timer0 – Watchdog/Interval Timer from Related Links.

Bits 7..5: Reserved Bits

These bits are reserved for future use and must be set to ‘0’.

Bit 4: WDCE – Watchdog Change Enable

This bit is controlled by the firmware and must be set to ‘0’.

Bit 3: WDE – Watchdog Enable

0 = Watchdog timer disabled

1 = Watchdog timer enabled

Bits 2..0: WDPS[2:0] – Watchdog Timer Prescaler Selection

The WDPS value determines the watchdog time-out period.