1 PolarFire FPGA Dynamic Reconfiguration Interface

Each CCC and transceiver has a Dynamic Reconfiguration Interface (DRI) that can be enabled to configure its parameters without reprogramming the device. The volatile configuration registers control CCC and transceiver reconfiguration that are loaded with values from the flash configuration bits at power-up. An APB3 bus initiator must be interfaced to the CCC and transceiver using a DRI macro for dynamic configuration. The APB3 bus initiator is required to dynamically modify the CCC and transceiver configuration register values as per the design needs.

Any of the configuration registers can be accessed dynamically using the APB3 interface. This document does not discuss all the Fabric CCC and transceiver registers that can be dynamically configured. It describes how to dynamically change the output clock frequency in CCC and the data rate of transceivers.