50.4.1 External Clock/Oscillator Timing Requirements

Figure 50-4. Clock Timing


Standard Operating Conditions (unless otherwise stated)
Param No.	Sym.	Characteristic	Min.	Typ. †	Max.	Units	Conditions
ECL Oscillator
OS1	F_ECL	Clock Frequency	—	—	1	MHz
OS2	T_{ECL_DC}	Clock Duty Cycle	40	—	60	%
ECM Oscillator
OS3	F_ECM	Clock Frequency	—	—	16	MHz
OS4	T_{ECM_DC}	Clock Duty Cycle	40	—	60	%
ECH Oscillator
OS5	F_ECH	Clock Frequency	—	—	64	MHz	V_DD ≥ 2.7V
OS5A	F_ECH	Clock Frequency	—	—	32	MHz	V_DD < 2.7V
OS6	T_{ECH_DC}	Clock Duty Cycle	40	—	60	%
LP Oscillator
OS7	F_LP	Clock Frequency⁽³⁾	—	—	32	kHz
XT Oscillator
OS8	F_XT	Clock Frequency⁽³⁾	—	—	4	MHz
HS Oscillator
OS9	F_HS	Clock Frequency⁽³⁾	4	—	8	MHz	FEXTOSC = `b0010
OS9A			8	—	16	MHz	FEXTOSC = `b0011
OS9B			16	—	24	MHz	FEXTOSC = `b0100
0S9C			24	—	32	MHz	FEXTOSC = `b0101
OS10*	C_OSC1/OSC2	Parasitic Pin Capacitance	—	7	—	pF
OS11*	C_L	Crystal Load Capacitance	—	8	—	pF	F_HS > 8 MHz
OS11A*	C_L	Crystal Load Capacitance	—	12	—	pF	F_HS ≤ 8 MHz
OS12*	R_ES	Equivalent Series Resistance⁽³⁾	—	—	200	Ω	FEXTOSC = `'b0010`, 4 MHz crystal
OS12A*			—	—	100	Ω	FEXTOSC = `'b0010`, 8 MHz crystal; V_DD ≥ 2.5V
OS12B*			—	—	50	Ω	FEXTOSC = `'b0011`, 16 MHz crystal; V_DD ≥ 2.5V
OS12C*			—	—	40	Ω	FEXTOSC = `'b0100`, 24 MHz crystal; V_DD ≥ 2.5V
OS12D*			—	—	40	Ω	FEXTOSC = `'b0101`, 32 MHz crystal; V_DD ≥ 2.5V
Secondary Oscillator
OS13*	F_SEC	Clock Frequency	—	32.768	—	kHz
OS14*	C_SOSCI	SOSCI Parasitic Pin Capacitance	—	6.9	—	pF
OS14A*	C_SOSCO	SOSCO Parasitic Pin Capacitance	—	5.6	—	pF
OS15*	C_L	Crystal Load Capacitance	8	—	9	pF	SOSCPWR = `0`
OS15A*	C_L	Crystal Load Capacitance	10	—	12.5	pF	SOSCPWR = `1`
OS16*	R_ES	Equivalent Series Resistance	—	—	50	kΩ	SOSCPWR = `0`
OS16A*	R_ES	Equivalent Series Resistance	—	—	100	kΩ	SOSCPWR = `1`
System Oscillator
OS20	F_OSC	System Clock Frequency⁽²⁾	—	—	64	MHz
OS21	F_CY	Instruction Frequency	—	F_OSC/4	—	MHz
OS22	T_CY	Instruction Period⁽¹⁾	62.5	1/F_CY	—	ns
Note: Instruction cycle period (T_CY) equals four times the input oscillator time base period. All specified values are based on characterization data for that particular oscillator type under standard operating conditions with the device executing code. Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current consumption. All devices are tested to operate at “min” values with an external clock applied to OSC1 pin. When an external clock input is used, the “max” cycle time limit is “DC” (no clock) for all devices. The system clock frequency (F_OSC) is selected by the “main clock switch controls” as described in the “Power-Saving Mode Operation” section. The HS Oscillator modes require an appropriate crystal or resonator to be connected to the device. For clocking the device with the external square wave, one of the EC mode selections must be used.