58.13.1.11 Two-wire Serial Interface Characteristics

The following table describes the requirements for devices connected to the Two-Wire Serial Bus.

For additional information on timing symbols, refer to the figure below.

Table 58-61. Two-wire Serial Bus Requirements
SymbolParameterConditionMin.Max.Unit
VILLow-level Input Voltage-0.30.3 VDDIOV
VIHHigh-level Input Voltage0.7 × VDDIOVCC + 0.3V
VhysHysteresis of Schmitt Trigger Inputs0.150V
VOLLow-level Output Voltage3 mA sink current0.4V
tRRise Time for both TWD and TWCK20 + 0.1Cb(1)(2)300ns
tOFOutput Fall Time from VIHmin to VILmax10 pF < Cb < 400 pF

see the figure below

20 + 0.1Cb(1)(2)250ns
Ci(1)Capacitance for each I/O Pin10pF
fTWCKTWCK Clock Frequency0400kHz
RPValue of Pull-up resistorfTWCK ≤ 100 kHz(VDDIO - 0.4V) ÷ 3mA1000ns ÷ Cb
fTWCK > 100 kHz300ns ÷ Cb
tLOWLow Period of the TWCK clockfTWCK ≤ 100 kHz(3)µs
fTWCK > 100 kHz(3)μs
tHIGHHigh period of the TWCK clockfTWCK ≤ 100 kHz(4)μs
fTWCK > 100 kHz(4)μs
tHD;STAHold Time (repeated) START ConditionfTWCK ≤ 100 kHztHIGHμs
fTWCK > 100 kHztHIGHμs
tSU;STASet-up time for a repeated START conditionfTWCK ≤ 100 kHztHIGHμs
fTWCK > 100 kHztHIGHμs
tHD;DATData hold timefTWCK ≤ 100 kHz03 × tCPMCK(5)μs
fTWCK > 100 kHz03 ×tCPMCK(5)μs
tSU;DATData setup timefTWCK ≤ 100 kHztLOW - 3 × tCPMCK(5)ns
fTWCK > 100 kHztLOW - 3 × tCPMCK(5)ns
tSU;STOSetup time for STOP conditionfTWCK ≤ 100 kHztHIGHμs
fTWCK > 100 kHztHIGHμs
tHD;STAHold Time (repeated) START ConditionfTWCK ≤ 100 kHztHIGHμs
fTWCK > 100 kHztHIGHμs
Note:
  1. Required only for fTWCK > 100 kHz.
  2. Cb = capacitance of one bus line in pF. Per I2C standard, Cb max = 400pF.
  3. The TWCK low period is defined as follows: tLOW = ((CLDIV × 2CKDIV) + 4) × tMCK.
  4. The TWCK high period is defined as follows: tHIGH = ((CHDIV × 2CKDIV) + 4) × tMCK.
  5. tCPMCK = MCK bus period
Figure 58-27. Two-wire Serial Bus Timing