16.1 PPS Inputs

Each peripheral has a PPS register with which the input pin to the peripheral is selected. Although each peripheral has its own PPS input selection register, the selections are identical for every peripheral, as shown in xxxPPS. Not all ports are available for input, as shown in Table 16-1.

Multiple peripherals can operate from the same source simultaneously. Port reads always return the pin level regardless of peripheral PPS selection. If a pin also has analog functions associated, the ANSEL bit for that pin must be cleared to enable the digital input buffer.

Important: The notation “xxx” in the generic register name is a placeholder for the peripheral identifier. For example, xxx = INT for the INTPPS register.
Table 16-1. PPS Input Signal Routing Options
Input Signal NameInput Register NameDefault Location at POR (14/16-pin devices)Reset Value (xxxPPS[4:0]) 14/16-pin devicesDefault Location at POR (20-pin devices)Reset Value (xxxPPS[4:0]) 20-pin devicesPORT From Which Input Is Available
INTINTPPSRA200010RA200010AB
T0CKIT0CKIPPSRA200010RA200010AB
T1CKIT1CKIPPSRA500101RA500101AC
T1GT1GPPSRA400100RA400100BC
T2INT2INPPSRA500101RA500101AC
T3CKIT3CKIPPSRC510101RC510101BC
T3GT3GPPSRC410100RC410100AC
T4INT4INPPSRC110001RC110001BC
T5CKIT5CKIPPSRC010000RC010000AC
T5GT5GPPSRC310011RC310011BC
T6INT6INPPSRC210010RC210010BC
MDCARLMDCARLPPSRC210010RC210010AC
MDCARHMDCARHPPSRC510101RC510101AC
MDSRCMDSRCPPSRA100001RA100001AC
CCP1INCCP1INPPSRC510101RC510101BC
CCP2INCCP2INPPSRC310011RC310011BC
CCP3INCCP3INPPSRA200010RA200010BC
CCP4INCCP4INPPSRA400100RA400100BC
CWG1INCWG1INPPSRA200010RA200010BC
CWG2INCWG2INPPSRA200010RA200010BC
CLCIN0CLCIN0PPSRC310011RA200010AC
CLCIN1CLCIN1PPSRC410100RC310011AC
CLCIN2CLCIN2PPSRC110001RB401100BC
CLCIN3CLCIN3PPSRA500101RB501101BC
ADACTADACTPPSRC210010RC210010BC
SCL1/SCK1SSP1CLKPPSRC0(1)10000RB6(1)01110BC
SDA1/SDI1SSP1DATPPSRC1(1)10001RB4(1)01100BC
SS1SS1PPSRC310011RC610110AC
SCL2/SCK2SSP2CLKPPSRC4(1)10100RB7(1)01111BC
SDA2/SDI2SSP2DATPPSRC5(1)10101RB5(1)01101BC
SS2SS2PPSRA000000RA100001BC
RX1/DT1RX1PPSRC510101RB501101BC
TX1/CK1CK1PPSRC410100RB701111BC
SMT1SIGSMT1SIGPPSRC010000RC010000BC
SMT1WINSMT1WINPPSRA500101RA500101BC
Note:
  1. Some pads are configured for I2C logic levels; clock and data signals may be assigned to any of these pins. Assignments to other pins (e.g., RA5) will operate, but logic levels will be standard TTL/ST as selected by the INLVL register.
Table 16-2. PPS Input Register Values
Desired Input PinValue to Write to Register
RC701 0111
RC601 0110
RC501 0101
RC401 0100
RC301 0011
RC201 0010
RC101 0001
RC001 0000
RB700 1111
RB600 1110
RB500 1101
RB400 1100
RA500 0101
RA400 0100
RA300 0011
RA200 0010
RA100 0001
RA000 0000