16.8 Register Summary - PPS
Note: PORTB
associated RxyPPS register as well as RC6PPS and RC7PPS registers are only available for
20-pin or higher pin count devices.
Offset | Name | Bit Pos. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|---|---|
0x00 ... 0x1E8E | Reserved | |||||||||
0x1E8F | PPSLOCK | 7:0 | PPSLOCKED | |||||||
0x1E90 | INTPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1E91 | T0CKIPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1E92 | T1CKIPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1E93 | T1GPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1E94 | T3CKIPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1E95 | T3GPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1E96 | T5CKIPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1E97 | T5GPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1E98 ... 0x1E9B | Reserved | |||||||||
0x1E9C | T2INPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1E9D | T4INPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1E9E | T6INPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1E9F ... 0x1EA0 | Reserved | |||||||||
0x1EA1 | CCP1PPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1EA2 | CCP2PPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1EA3 | CCP3PPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1EA4 | CCP4PPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1EA5 ... 0x1EA8 | Reserved | |||||||||
0x1EA9 | SMT1WINPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1EAA | SMT1SIGPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1EAB ... 0x1EB0 | Reserved | |||||||||
0x1EB1 | CWG1PPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1EB2 | CWG2PPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1EB3 ... 0x1EB7 | Reserved | |||||||||
0x1EB8 | MDCARLPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1EB9 | MDCARHPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1EBA | MDSRCPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1EBB | CLCIN1PPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1EBC | CLCIN2PPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1EBD | CLCIN3PPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1EBE | CLCIN4PPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1EBF ... 0x1EC2 | Reserved | |||||||||
0x1EC3 | ADACTPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1EC4 | Reserved | |||||||||
0x1EC5 | SSP1CLKPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1EC6 | SSP1DATPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1EC7 | SSP1SSPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1EC8 | SSP2CLKPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1EC9 | SSP2DATPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1ECA | SSP2SSPPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1ECB | RX1PPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1ECC | CK1PPS | 7:0 | PORT[1:0] | PIN[2:0] | ||||||
0x1ECD ... 0x1F0F | Reserved | |||||||||
0x1F10 | RA0PPS | 7:0 | PPS[5:0] | |||||||
0x1F11 | RA1PPS | 7:0 | PPS[5:0] | |||||||
0x1F12 | RA2PPS | 7:0 | PPS[5:0] | |||||||
0x1F13 | Reserved | |||||||||
0x1F14 | RA4PPS | 7:0 | PPS[5:0] | |||||||
0x1F15 | RA5PPS | 7:0 | PPS[5:0] | |||||||
0x1F16 ... 0x1F1B | Reserved | |||||||||
0x1F1C | RB4PPS | 7:0 | PPS[5:0] | |||||||
0x1F1D | RB5PPS | 7:0 | PPS[5:0] | |||||||
0x1F1E | RB6PPS | 7:0 | PPS[5:0] | |||||||
0x1F1F | RB7PPS | 7:0 | PPS[5:0] | |||||||
0x1F20 | RC0PPS | 7:0 | PPS[5:0] | |||||||
0x1F21 | RC1PPS | 7:0 | PPS[5:0] | |||||||
0x1F22 | RC2PPS | 7:0 | PPS[5:0] | |||||||
0x1F23 | RC3PPS | 7:0 | PPS[5:0] | |||||||
0x1F24 | RC4PPS | 7:0 | PPS[5:0] | |||||||
0x1F25 | RC5PPS | 7:0 | PPS[5:0] | |||||||
0x1F26 | RC6PPS | 7:0 | PPS[5:0] | |||||||
0x1F27 | RC7PPS | 7:0 | PPS[5:0] |