29.3.1 Register Definitions: I²C Mode

The MSSPx module has seven registers accessible for I²C operation.

These registers are:

• MSSP Status register (SSPxSTAT)
• MSSP Control register 1 (SSPxCON1)
• MSSP Control register 2 (SSPxCON2)
• MSSP Control register 3 (SSPxCON3)
• Serial Receive/Transmit Buffer register (SSPxBUF)
• MSSP Address register (SSPxADD)
• I²C Client Address Mask register (SSPxMSK)
• MSSP Shift register (SSPSR) (Not directly accessible)

SSPxCON1, SSPxCON2, SSPxCON3 and SSPxSTAT are the Control and STATUS registers in I²C mode operation. The SSPxCON1, SSPxCON2 and SSPxCON3 registers are readable and writable. The lower six bits of SSPxSTAT are read-only. The upper two bits of SSPxSTAT are read/write. SSPSR is the Shift register used for shifting data in or out. SSPxBUF is the buffer register to which data bytes are written to or read from. SSPxADD contains the client device address when the MSSP is configured in I²C Client mode. When the MSSP is configured in Host mode, the lower seven bits of SSPxADD act as the Baud Rate Generator reload value.

SSPxMSK holds the client address mask value when the module is configured for 7-Bit Address Masking mode. While it is a separate register, it shares the same SFR address as SSPxADD; it is only accessible when the SSPM[3:0] bits are specifically set to permit access. In receive operations, SSPSR and SSPxBUF together create a double-buffered receiver. When SSPSR receives a complete byte, it is transferred to SSPxBUF and the SSPxIF interrupt is set. During transmission, SSPxBUF is not double-buffered. A write to SSPxBUF will write to both SSPxBUF and SSPSR.