34.15.2 CMxCON0
Name: | CMxCON0 |
Offset: | 0x990,0x994 |
Comparator x Control Register 0
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
EN | OUT | POL | HYS | SYNC | |||||
Access | R/W | RO | R/W | R/W | R/W | ||||
Reset | 0 | 0 | 0 | 0 | 0 |
Bit 7 – EN Comparator Enable bit
Value | Description |
---|---|
1 |
Comparator is enabled |
0 |
Comparator is disabled and consumes no active power |
Bit 6 – OUT Comparator Output bit
Bit 4 – POL Comparator Output Polarity Select bit
Value | Description |
---|---|
1 |
Comparator output is inverted |
0 |
Comparator output is not inverted |
Bit 1 – HYS Comparator Hysteresis Enable bit
Value | Description |
---|---|
1 |
Comparator hysteresis enabled |
0 |
Comparator hysteresis disabled |
Bit 0 – SYNC Comparator Output Synchronous Mode bit
Output updated on the falling edge of prescaled Timer1 clock.
Value | Description |
---|---|
1 |
Comparator output to Timer1 and I/O pin is synchronous to changes on the prescaled Timer1 clock |
0 |
Comparator output to Timer1 and I/O pin is asynchronous |