29.5.9 SSP Mask Register

An SSP Mask (SSPxMSK) register is available in I²C Client mode as a mask for the value held in the SSPSR register during an address comparison operation. A zero (‘0’) bit in the SSPxMSK register has the effect of making the corresponding bit of the received address a “don’t care”.

This register is reset to all ‘1’s upon any Reset condition and, therefore, has no effect on standard SSP operation until written with a mask value.

The SSP Mask register is active during:

• 7-bit Address mode: Address compare of A[7:1]
• 10-bit Address mode: Address compare of A[7:0] only. The SSP mask has no effect during the reception of the first (high) byte of the address.