18.6.4 T0CON1

Timer0 Control Register 1
Name: T0CON1
Offset: 0x59F

Bit 76543210 
 T0CS[2:0]T0ASYNCT0CKPS[3:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 7:5 – T0CS[2:0] Timer0 Clock Source Select

Table 18-1. Timer0 Clock Source Selections
T0CSClock Source
111CLC1_out
110SOSC
101MFINTOSC(500 kHz)
100LFINTOSC
011HFINTOSC
010FOSC/4
001Pin selected by T0CKIPPS (Inverted)
000Pin selected by T0CKIPPS (Noninverted)

Bit 4 – T0ASYNC TMR0 Input Asynchronization Enable

ValueDescription
1

The input to the TMR0 counter is not synchronized to system clocks

0

The input to the TMR0 counter is synchronized to FOSC/4

Bits 3:0 – T0CKPS[3:0] Prescaler Rate Select

ValueDescription
1111

1:32768

1110

1:16384

1101

1:8192

1100

1:4096

1011

1:2048

1010

1:1024

1001

1:512

1000

1:256

0111

1:128

0110

1:64

0101

1:32

0100

1:16

0011

1:8

0010

1:4

0001

1:2

0000

1:1