The INDFn registers are not physical registers. Any instruction that accesses an
INDFn register actually accesses the register at the address specified by the File
Select Registers (FSR). If the FSRn address specifies one of the two INDFn registers,
the read will return ‘0’ and the write will not occur (though Status
bits may be affected). The FSRn register value is created by the pair FSRnH and
FSRnL.
The FSR registers form a 16-bit address that allows an addressing space with
65536 locations. These locations are divided into three memory regions:
Traditional/Banked Data
Memory
Linear Data Memory
Program Flash Memory
Data EEPROM
Figure 5-8. Indirect Addressing PIC16(L)F18425/45
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
