22.2.3 Software Interrupt Mode
When the Capture mode is changed, a false capture interrupt may be generated. The user must keep the CCPxIE Interrupt Priority bit of the PIE6 register clear to avoid false interrupts. Additionally, the user must clear the CCPxIF Interrupt Flag bit of the PIR6 register following any change in Operating mode.
Important: Clocking Timer1 from the system clock
(FOSC) may not be used in Capture mode. For Capture mode to recognize the
trigger event on the CCPx pin, Timer1 must be clocked from the instruction clock
(FOSC/4) or from an external clock source.