46.12.5 Digital Frequency Locked Loop (DFLL48M) Characteristics

Table 46-53. DFLL48M Characteristics - Open Loop Mode(1,2)
SymbolParameterConditionsMin.Typ.Max.Units
FOpenOUTOutput frequencyDFLLVAL.COARSE=DFLL48M_COARSE_CAL

DFLLVAL.FINE=512

46.647.849MHz
TOpenSTARTUPStartup timeDFLLVAL.COARSE=DFLL48M_COARSE_CAL

DFLLVAL.FINE=512

FOUT within 90% of final value

-8.39.1µs
Note:
  1. DFLL48 in open loop can be used only with LDO regulator.
  2. These values are based on characterization.
Table 46-54. DFLL48M Characteristics - Closed Loop Mode
SymbolParameterConditionsMin.Typ.Max.Units
FCloseOUTAverage Output frequency

fREF = XTAL, 32.768kHz, 100ppm

DFLLMUL=1464

47.96347.97247.981MHz
FREF(2,3)Input reference frequency7323276833000Hz
FCloseJitter(1)Period Jitter

fREF = XTAL, 32.768kHz, 100ppm

DFLLMUL=1464

--0.51ns
TLock(1)Lock time

FREF = XTAL, 32.768kHz, 100ppm
DFLLMUL=1464
DFLLVAL.COARSE=DFLL48M_COARSE_CAL
DFLLVAL.FINE = 512
DFLLCTRL.BPLCKC = 1
DFLLCTRL.QLDIS = 0
DFLLCTRL.CCDIS = 1
DFLLMUL.FSTEP = 10  

200700µs
Note:
  1. These values are based on characterization.
  2. To insure that the device stays within the maximum allowed clock frequency, any reference clock for the DFLL in close loop must be within a 2% error accuracy.
  3. These values are based on simulation. They are not covered by production test limits or characterization.
Table 46-55. DFLL48M Power Consumption(1)
SymbolParameterConditionsTaMin.Typ.Max.Units
IDDPower consumption Open LoopDFLLVAL.COARSE=DFLL48M_COARSE_CALMax.85°C

Typ.25°C

-286-µA
IDDPower consumption Closed LoopFREF = 32.768kHz, VCC=3.3V-362-µA
Note:
  1. These values are based on characterization.