67.4.2.3.1 ULP0 Mode

ULP0 mode maintains a very low frequency clock to wake up on any interrupt.

The selection of the clock depends on the current consumption target versus wake-up time. The higher the frequency, the higher the power consumption.

The sequence to enter ULP0 mode is detailed below. The code used to enter this mode must be executed out of the internal SRAM.

1. Set the DDR to Self-Refresh mode.
2. Set the interrupts to wake up the system.
3. Disable all peripheral clocks.
4. Set the I/Os to an appropriate state and disable the USB transceivers (refer to the section Special Function Registers (SFR)).
5. Switch the system clock to the selected clock (RC12MHZ, 32 KHz Slow Clock.) according to the power consumption and wake-up time awaited (see table VDDCORE Power Consumption in Ultra Low-power Mode: AMP2).
6. Disable the PLLs and all unused clocks (main oscillator, 12 MHz RC oscillator or 32 KHz oscillator).
7. Enter the Wait for Interrupt mode and disable the PCK clock in the PMC_SCDR.

The wake-up from ULP0 mode is triggered by any enabled interrupt. When resuming, the software reconfigures the system (oscillator, PLL, etc.) in the same state as before WFI.