24.2.3 Timer/Counter Size
Each timer module can be configured in one of three different counter sizes; 8-, 16-, and 32-bit. The size of the counter determines the maximum value it can count to before an overflow occurs and the count is reset back to zero. Table 24-1 shows the maximum values for each of the possible counter sizes.
Counter size | Max. (hexadecimal) | Max. (decimal) |
|---|---|---|
8-bit | 0xFF | 255 |
16-bit | 0xFFFF | 65,535 |
32-bit | 0xFFFFFFFF | 4,294,967,295 |
When using the counter in 16- or 32-bit count mode, Compare Capture register 0 (CC0) is used to store the period value when running in PWM generation match mode.
When using 32-bit counter size, two 16-bit counters are chained together in a cascade formation. Except in SAM D09/D10/D11, Even numbered TC modules (e.g. TC0, TC2) can be configured as 32-bit counters. The odd numbered counters will act as slaves to the even numbered masters, and will not be reconfigurable until the master timer is disabled. The pairing of timer modules for 32-bit mode is shown in Table 24-2.
Master TC Module | Slave TC Module |
|---|---|
TC0 | TC1 |
TC2 | TC3 |
... | ... |
TCn-1 | TCn |
In SAM D09/D10/D11, odd numbered TC modules (e.g. TC1) can be configured as 32-bit counters. The even numbered(e.g. TC2) counters will act as slaves to the odd numbered masters.