8.10.2.8 Programming and Debug Interface Configuration

Note: These fuses are only effective after a Reset (Reset initialization has run) and if the device is in the locked state.
Name: PDICFG
Offset: 0x0A
Reset: 0x0003
Property: -

Bit 15141312111098 
 KEY[11:4] 
Access RRRRRRRR 
Reset 00000000 
Bit 76543210 
 KEY[3:0]  LEVEL[1:0] 
Access RRRRRR 
Reset 000011 

Bits 15:4 – KEY[11:0] NVM Protection Activation Key

ValueNameDescription
0xB45 NVMACT NVM protection active
Other - Not active

Bits 1:0 – LEVEL[1:0] Protection Level

Important: There is no way to recover from this mode, so once NVMACCDIS is enabled, it is not possible to re-enable UPDI access for device programming. Ensure that the consequences of enabling this feature are fully comprehended before enabling this mode.
Note: After NVMACCDIS activation, the access to NVM is very restricted for external testing. Some testing will be possible, but advanced failure analysis will not be possible.
ValueNameDescription
Other Reserved
0x2 NVMACCDIS NVM access through UPDI is disabled.

Program and Debug Interface Disable (PDID): All erase and write commands to NVM must be executed from the Boot Code section (bootloader). Chip Erase and User Row write access is blocked. The CRC status is available.

0x3 BASIC The UPDI peripheral and the UPDI pin are working as described in the UPDI section