8.3.2.2 Power-down Considerations
The figure below shows the SAMA5D2 LPDDR2 SIP power-down sequence that starts by asserting the NRST line to 0. Once NRST is asserted, the supply inputs can be immediately shut down without any specific timing or order except for DDRM_VDD12 and DDRM_VDD18. VDDBU may not be shut down if the application uses a backup battery on this supply input. In applications where VDDFUSE is powered, it is mandatory to shut down VDDFUSE prior to removing any other supply. VDDFUSE can be removed before or after asserting the NRST signal.
| Symbol | Parameter | Conditions | Min | Max | Unit |
|---|---|---|---|---|---|
| tRSTPD | Reset delay at power-down | From NRST low to the first supply turn-off | 0 | – | ms |
| t1 | VDDFUSE delay at shut-down | From VDDFUSE < 1V to the first supply turn-off | 0 | – | |
| t2 | DDRM_VDD12 to DDRM_VDD18 delay | From DDRM_VDD12 zeroed to DDRM_VDD18 turn-off | 0 | – | |
| t3 | LPDDR2 power-off delay | From NRST low to DDRM_VDD18 zeroed | – | 2000 |