15.12.5 Digital Frequency Locked Loop (DFLL48M) Characteristics

Table 15-42. DFLL48M Characteristics - Open Loop Mode(1,2)
Symbol Parameter Conditions Min. Typ. Max. Units
FOpenOUT Output frequency DFLLVAL.COARSE=DFLL48M_COARSE_CAL

DFLLVAL.FINE=512

 46.6 47.8 49 MHz
TOpenSTARTUP Startup time DFLLVAL.COARSE=DFLL48M_COARSE_CAL

DFLLVAL.FINE=512

FOUT within 90% of final value

 - 8.3 9.1 µs
Note:
  1. DFLL48 in open loop can be used only with LDO regulator.
  2. These values are based on characterization.
Table 15-43. DFLL48M Characteristics - Closed Loop Mode
Symbol Parameter Conditions Min. Typ. Max. Units
FCloseOUT Average Output frequency

fREF = XTAL, 32.768kHz, 100ppm

DFLLMUL=1464

 47.963 47.972 47.981 MHz
FREF(2,3) Input reference frequency 732 32768 33000 Hz
FCloseJitter(1) Period Jitter

fREF = XTAL, 32.768kHz, 100ppm

DFLLMUL=1464

 - - 0.51 ns
TLock(1) Lock time

FREF = XTAL, 32.768kHz, 100ppm
DFLLMUL=1464
DFLLVAL.COARSE=DFLL48M_COARSE_CAL
DFLLVAL.FINE = 512
DFLLCTRL.BPLCKC = 1
DFLLCTRL.QLDIS = 0
DFLLCTRL.CCDIS = 1
DFLLMUL.FSTEP = 10  

200 700 µs
Note:
  1. These values are based on characterization.
  2. To insure that the device stays within the maximum allowed clock frequency, any reference clock for the DFLL in close loop must be within a 2% error accuracy.
  3. These values are based on simulation. They are not covered by production test limits or characterization.
Table 15-44. DFLL48M Power Consumption(1)
Symbol Parameter Conditions Ta Min. Typ. Max. Units
IDD Power consumption Open Loop DFLLVAL.COARSE=DFLL48M_COARSE_CAL Max.85°C

Typ.25°C

 - 286 - µA
IDD Power consumption Closed Loop FREF = 32.768kHz, VCC=3.3V - 362 - µA
Note:
  1. These values are based on characterization.