14.2.2.3.3 Configuration of non IEEE 802.15.4 Compliant Scenarios

Sniffer

The table below shows an AT86RF212B RX_AACK configuration to setup a sniffer device. Other RX_AACK configuration bits, refer to Table 14-9, should be set to their reset values.

All frames received are indicated by an IRQ_2 (RX_START) and IRQ_3 (TRX_END). After frame reception the RX_CRC_VALID bit in the PHY_RSSI register (PHY_RSSI.RX_CRC_VALID) is updated with the result of the FCS check. The RX_CRC_VALID bit needs to be checked in order to dismiss corrupted frames.

Table 14-13. Configuration of a Sniffer Device
Register Address	Register Bits	Register Name	Description
0x17	1	AACK_PROM_MODE	1: Enable promiscuous mode.
0x2E	4	AACK_DIS_ACK	1: Disable generation of acknowledgment.

This operating mode is similar to the promiscuous mode.

Reception of Reserved Frames

In RX_AACK mode, frames with reserved frame types can also be handled. This might be required when implementing proprietary, non-standard compliant, protocols. The reception of reserved frame types is an extension of the AT86RF212B Frame Filter. Received frames are either handled like data frames, or may be allowed to completely bypass the Frame Filter. The flow chart in Figure 14-27 shows the corresponding state machine.

In addition to Table 14-10 or Table 14-11, the table below shows RX_AACK configuration registers required to setup a node to receive reserved frame types.

Table 14-14. RX_AACK Configuration to Receive Reserved Frame Types
Register Address	Register Bits	Register Name	Description
0x17	4	AACK_UPLD_RES_FT	1: Enable reserved frame type reception.
0x17	5	AACK_FLTR_RES_FT	Filter reserved frame types like data frame type, see note below. 0: Disable reserved frame types filtering. 1: Enable reserved frame types filtering.

There are three different options for handling reserved frame types.

AACK_UPLD_RES_FT = 1, AACK_FLT_RES_FT = 0:
Any non-corrupted frame with a reserved frame type is indicated by an IRQ_3 (TRX_END) interrupt. No further address filtering is applied on those frames. An IRQ_5 (AMI) interrupt is never generated and the acknowledgment subfield is ignored.
AACK_UPLD_RES_FT = 1, AACK_FLT_RES_FT = 1:
If AACK_FLT_RES_FT = 1 any frame with a reserved frame type is filtered by the address filter similar to a data frame as described in the standard. This implies the generation of the IRQ_5 (AMI) interrupts upon address match. An IRQ_3 (TRX_END) interrupt is only generated if the address matched and the frame was not corrupted. An acknowledgment is only send, when the ACK request subfield was set in the received frame and an IRQ_3 (TRX_END) interrupt occurred.
AACK_UPLD_RES_FT = 0:
Any received frame with a reserved frame type is discarded.

Short Acknowledgment Frame (ACK) Start Timing

The AACK_ACK_TIME bit in the XAH_CTRL_1 register (XAH_CTRL_1.AACK_ACK_TIME), defines the delay between the end of the frame reception and the start of the transmission of an acknowledgment frame.

Table 14-15. ACK Start Timing for Unslotted Operation
Register Address	Register Bit	Register Name	Description
0x17	2	AACK_ACK_TIME	0: IEEE 802.15.4 standard compliant acknowledgement timing of 12 symbol periods. 1: Non-standard IEEE 802.15.4 reduced acknowledgment delay is set to two symbol periods (BPSK-20, O-QPSK-{100,200,400}) or three symbol periods (BPSK-40, O-QPSK-{250,500,1000}).

This feature can be used in all scenarios, independent of other configurations. However, shorter acknowledgment timing is especially useful when using High Data Rate Modes to increase battery lifetime and to improve the overall data throughput;.

In slotted operation mode, the acknowledgment transmission is actually started by pin 11 (SLP_TR). The table below shows that the AT86RF212B enables the trigger pin with an appropriate delay. Thus, a transmission cannot be started earlier.

Table 14-16. ACK Start Timing for Slotted Operation
Register Address	Register Bit	Register Name	Description
0x17	2	AACK_ACK_TIME	0: Acknowledgment frame transmission can be triggered after six symbol periods. 1: Acknowledgment frame transmission can be triggered after three symbol periods.