57.7.29 ADC Touchscreen Correction Values Register

This register can only be written if the WPEN bit is cleared in the ADC Write Protection Mode Register.

Name: ADC_TSCVR
Offset: 0xDC
Reset: 0x00000000
Property: Read/Write

Bit 3130292827262524 
 TSGAINCORR[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 2322212019181716 
 TSGAINCORR[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 15141312111098 
 TSOFFSETCORR[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 
Bit 76543210 
 TSOFFSETCORR[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 31:16 – TSGAINCORR[15:0] Touchscreen Gain Correction

Gain correction to apply on converted data for the touchscreen channels. Only bits 0 to 15 are relevant (other bits are ignored and read as 0).

Bits 15:0 – TSOFFSETCORR[15:0] Touchscreen Offset Correction

Offset correction to apply on converted data for the touchscreen channels. The offset is signed (2’s complement), only bits 0 to 11 are relevant (other bits are ignored and read as 0).