57.7.20 ADC Analog Control Register
This register can only be written if the WPEN bit is cleared in the ADC Write Protection Mode Register.
By default, bits 12 and 13 are set to 1 and 0, respectively, and must not be modified.
| Name: | ADC_ACR |
| Offset: | 0x94 |
| Reset: | 0x00000101 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| IBCTL[1:0] | |||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 1 | |||||||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| PENDETSENS[1:0] | |||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 1 | |||||||
Bits 9:8 – IBCTL[1:0] ADC Bias Current Control
Adapts performance versus power consumption. Refer to the section “Electrical Characteristics” for further details.
Bits 1:0 – PENDETSENS[1:0] Pen Detection Sensitivity
Modifies the pen detection input pull-up resistor value. Refer to the section “Electrical Characteristics” for further details.