29.16.27 PMC Generic Clock Status Register 0
The following configuration values are valid for all listed bit names of this
register:
0: The corresponding generic clock is disabled.
1: The corresponding generic clock is enabled.
Name: | PMC_GCSR0 |
Offset: | 0x00C0 |
Reset: | 0x00000000 |
Property: | Read-only |
“PIDx” refers to
identifiers as defined in the table “Peripheral Identifiers".
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| | | | | | GPID26 | GPID25 | | |
Access | | | | | | R | R | | |
Reset | | | | | | 0 | 0 | | |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| | | | | GPID19 | | GPID17 | GPID16 | |
Access | | | | | R | | R | R | |
Reset | | | | | 0 | | 0 | 0 | |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| GPID15 | GPID14 | GPID13 | GPID12 | GPID11 | GPID10 | GPID9 | GPID8 | |
Access | R | R | R | R | R | R | R | R | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| GPID7 | GPID6 | GPID5 | | | | | | |
Access | R | R | R | | | | | | |
Reset | 0 | 0 | 0 | | | | | | |
Bits 25, 26 – GPIDx Generic Clock x
Status
Bit 19 – GPIDx Generic Clock x
Status
Bits 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17 – GPIDx Generic Clock x Status