15.6.7 Peripheral Interrupt Flag Status and Clear B

This flag is cleared by writing a '1' to the flag.

This flag is set when a Peripheral Access Error occurs while accessing the peripheral associated with the respective INTFLAGB bit, and will generate an interrupt request if INTENSET.ERR is '1'.

Writing a '0' to this bit has no effect.

Writing a '1' to this bit will clear the corresponding INTFLAGB interrupt flag.

Name:	INTFLAGB
Offset:	0x18
Reset:	0x000000
Property:	Secure


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16

Access
Reset


Bit	15	14	13	12	11	10	9	8

Access
Reset


Bit	7	6	5	4	3	2	1	0
			USB	HMATRIXHS	DMAC	NVMCTRL	DSU	IDAU
Access			RW/-/RW	RW/-/RW	RW/-/RW	RW/-/RW	RW/-/RW	RW/-/RW
Reset			0	0	0	0	0	0

Bit 5 – USB Interrupt Flag for USB

Bit 4 – HMATRIXHS Interrupt Flag for HMATRIXHS

Bit 3 – DMAC Interrupt Flag for DMAC

Bit 2 – NVMCTRL Interrupt Flag for NVMCTRL

Bit 1 – DSU Interrupt Flag for DSU

Bit 0 – IDAU Interrupt Flag for IDAU

Note: This bit field is only available for PIC32CM LS00/LS60 and has no effect for PIC32CM LE00.