35.5.7 Register Write Protection

To prevent any single software error from corrupting MPDDRC behavior, certain registers in the address space can be write-protected by setting the WPEN bit in the MPDDRC Write Protection Mode Register (MPDDRC_WPMR).

If a write access to a write-protected register is detected, the WPVS flag in the MPDDRC Write Protection Status Register (MPDDRC_WPSR) is set and the field WPVSRC indicates the register in which the write access has been attempted.

The WPVS bit is automatically cleared after reading MPDDRC_WPSR.

The following registers are write-protected when the bit WPEN is set:

• MPDDRC Mode Register
• MPDDRC Refresh Timer Register
• MPDDRC Configuration Register
• MPDDRC Timing Parameter 0 Register
• MPDDRC Timing Parameter 1 Register
• MPDDRC Memory Device Register
• MPDDRC Low-power DDR2 Low-power DDR3 and DDR3 Calibration and MR4 Register
• MPDDRC OCMS Register
• MPDDRC OCMS KEY1 Register
• MPDDRC OCMS KEY2 Register