22.6.4.3 SRAM Power Switch Configuration

The SRAM is divided into sub-blocks which can be switched OFF to optimize power consumption.

By default, all sub-blocks are switched ON, but it is possible to switch them OFF (excluding the first 4 KB sub-block which remains always powered) depending on the SRAM memory size use.

This behavior can be changed by configuring the RAMPSWC bit field in the Power Configuration register (PWCFG).

CAUTION: This configuration takes effect immediately. Therefore, users must ensure that no access is performed on a SRAM sub-block which is switched OFF. When a SRAM sub-block is switched from OFF to ON state, a delay of 1 µs is required before re-accessing it.

The first sub-block to be switched OFF is always at the top of the SRAM block memory, and the same behavior applies for the next switched OFF sub-blocks.