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11.13.34 IPR7
Peripheral Interrupt
Priority Register 7Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | I2C1EIP | I2C1IP | I2C1TXIP | I2C1RXIP | SPI1IP | SPI1TXIP | SPI1RXIP | |
Access | | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
Bit 6 – I2C1EIP I2C1 Error
Interrupt Priority
Value | Description |
---|
1 |
High
Priority |
0 |
Low
Priority |
Bit 5 – I2C1IP I2C1 Interrupt
Priority
Value | Description |
---|
1 |
High
Priority |
0 |
Low
Priority |
Bit 4 – I2C1TXIP I2C1 Transmit
Interrupt Priority
Value | Description |
---|
1 |
High
Priority |
0 |
Low
Priority |
Bit 3 – I2C1RXIP I2C1 Receive
Interrupt Priority
Value | Description |
---|
1 |
High
Priority |
0 |
Low
Priority |
Bit 2 – SPI1IP SPI1 Interrupt
Priority
Value | Description |
---|
1 |
High
Priority |
0 |
Low
Priority |
Bit 1 – SPI1TXIP SPI1 Transmit
Interrupt Priority
Value | Description |
---|
1 |
High
Priority |
0 |
Low
Priority |
Bit 0 – SPI1RXIP SPI1 Receive
Interrupt Priority
Value | Description |
---|
1 |
High
Priority |
0 |
Low
Priority |