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11.13.8 PIE1
Peripheral Interrupt
Enable Register 1| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | DMA3AIE | DMA3ORIE | DMA3DCNTIE | DMA3SCNTIE | DMA2AIE | DMA2ORIE | DMA2DCNTIE | DMA2SCNTIE | |
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 7 – DMA3AIE DMA3 Abort
Interrupt Enable
| Value | Description |
|---|
| 1 |
Enabled |
| 0 |
Disabled |
Bit 6 – DMA3ORIE DMA3 Overrun
Interrupt Enable
| Value | Description |
|---|
| 1 |
Enabled |
| 0 |
Disabled |
Bit 5 – DMA3DCNTIE DMA3 Destination
Count Interrupt Enable
| Value | Description |
|---|
| 1 |
Enabled |
| 0 |
Disabled |
Bit 4 – DMA3SCNTIE DMA3 Source Count
Interrupt Enable
| Value | Description |
|---|
| 1 |
Enabled |
| 0 |
Disabled |
Bit 3 – DMA2AIE DMA2 Abort
Interrupt Enable
| Value | Description |
|---|
| 1 |
Enabled |
| 0 |
Disabled |
Bit 2 – DMA2ORIE DMA2 Overrun
Interrupt Enable
| Value | Description |
|---|
| 1 |
Enabled |
| 0 |
Disabled |
Bit 1 – DMA2DCNTIE DMA2 Destination
Count Interrupt Enable
| Value | Description |
|---|
| 1 |
Enabled |
| 0 |
Disabled |
Bit 0 – DMA2SCNTIE DMA2 Source Count
Interrupt Enable
| Value | Description |
|---|
| 1 |
Enabled |
| 0 |
Disabled |
