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11.13.32 IPR5
Peripheral Interrupt
Priority Register 5Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| IOCSRIP | CLC4IP | CLC3IP | CLC2IP | CLC1IP | CWG1IP | PWM2IP | PWM2PIP | |
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
Bit 7 – IOCSRIP Signal Routing
Ports Interrupt-on-Change Interrupt Priority
Value | Description |
---|
1 |
High
Priority |
0 |
Low
Priority |
Bit 6 – CLC4IP CLC4 Interrupt Priority
Value | Description |
---|
1 |
High Priority |
0 |
Low Priority |
Bit 5 – CLC3IP CLC3 Interrupt Priority
Value | Description |
---|
1 |
High Priority |
0 |
Low Priority |
Bit 4 – CLC2IP CLC2 Interrupt Priority
Value | Description |
---|
1 |
High Priority |
0 |
Low Priority |
Bit 3 – CLC1IP CLC1 Interrupt
Priority
Value | Description |
---|
1 |
High
Priority |
0 |
Low
Priority |
Bit 2 – CWG1IP CWG1 Interrupt
Priority
Value | Description |
---|
1 |
High
Priority |
0 |
Low
Priority |
Bit 1 – PWM2IP PWM2 Parameter Interrupt Priority
Value | Description |
---|
1 |
High Priority |
0 |
Low Priority |
Bit 0 – PWM2PIP PWM2 Period
Interrupt Priority
Value | Description |
---|
1 |
High
Priority |
0 |
Low
Priority |