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11.13.30 IPR3
Peripheral Interrupt
Priority Register 3Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| TMR1GIP | TMR1IP | TMR0IP | IOCIP | VDDIO3IP | VDDIO2IP | OSFIP | CSWIP | |
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | |
Bit 7 – TMR1GIP TMR1 Gate Interrupt
Priority
Value | Description |
---|
1 |
High
Priority |
0 |
Low
Priority |
Bit 6 – TMR1IP TMR1 Interrupt
Priority
Value | Description |
---|
1 |
High
Priority |
0 |
Low
Priority |
Bit 5 – TMR0IP TMR0 Interrupt Priority
Value | Description |
---|
1 |
High Priority |
0 |
Low Priority |
Bit 4 – IOCIP Interrupt-on-Change
Interrupt Priority
Value | Description |
---|
1 |
High
Priority |
0 |
Low
Priority |
Bit 3 – VDDIO3IP VDDIO3 Interrupt Priority
Value | Description |
---|
1 |
High Priority |
0 |
Low Priority |
Bit 2 – VDDIO2IP VDDIO2 Interrupt Priority
Value | Description |
---|
1 |
High Priority |
0 |
Low Priority |
Bit 1 – OSFIP Oscillator Failure
Interrupt Priority
Value | Description |
---|
1 |
High
Priority |
0 |
Low
Priority |
Bit 0 – CSWIP Clock Switch
Interrupt Priority
Value | Description |
---|
1 |
High
Priority |
0 |
Low
Priority |