3.9 GPIO Header (J401 and J402)

The PIC32 WFI32 Curiosity HPC Board has two GPIO headers (J401 and J402) that provide access to some of the GPIO pins on the WFI32E02 Module. The MCLR Reset signal is also available on GPIO header 1 (J401). The following table lists the details of the GPIO header.

Table 3-14. GPIO Header 1 Pin Description – J401
Pin NumberPin on GPIO HeaderPin Description of GPIO HeaderPin on the WFI32E02 Module(1)(2)
J401-13V3_PKOBVCC NC
J401-2GNDGroundGND
J401-3RF_FE_8/RPK9GPIORF_FE_8/RPK9/RK9
J401-4SCK2/RPA11GPIOSCK2/RPA11/RA11
J401-5RF_FE_5/RPK11GPIORF_FE_5/RPK11/RK11
J401-6RF_FE_7/RPK8GPIORF_FE_7/RPK8/RK8
J401-7RF_FE_6/RPK10GPIORF_FE_6/RPK10/RK10
J401-8SDA2/RPA3GPIOSDA2/RPA3/RA3
J401-9RF_FE_4/RPK1GPIORF_FE_4/RPK1/RK1
J401-10RF_FE_2/RPK3GPIORF_FE_2/RPK3/RK3
J401-11ANA0/RPB12GPIOANA0/RPB12/RB12
J401-12

MCLR

Reset pinMCLR
J401-13INT0/AN17/CVD17/CVDR17/RPA10GPIOINT0/AN17/CVD17/CVDR17/RPA10/RA10
J401-14VBUSON/CVD1/CVDR1/CVDT6/AN1/RPB1GPIOVBUSON/CVD1/CVDR1/CVDT6/AN1/RPB1/RB1
J401-15U1TXUART1 transmit outputU1TX/RA9
J401-16BT_CLK_OUT/RPK4GPIOBT_CLK_OUT/RPK4/RK4
J401-17 SQICS1/RPC0GPIOSQICS1/RPC0/RC0
J401-18U1RTSnUART1 request to send handshaking signalU1RTSn/RA7
J401-19 U1RXUART1 receive inputU1RX/RA8
J401-20 SQID1/RPC3GPIOSQID1/RPC3/RC3
J401-21 U1CTSnUART1 Clear-to-Send handshaking signalU1CTSn/RA6
J401-22SCL2/RPA2GPIOSCL2/RPA2/RA2
J401-23GNDGroundGND
J401-243V3_PKOBVCCNC
Note:
  1. These are PPS pins that can be configured for any of the supported peripheral functions based on the end user application.
  2. For more details on the WFI32E02 pins, refer to the PIC32MZ W1 MCU and WFI32 Module with Wi-Fi and Hardware-Based Security Accelerator Data Sheet (DS70005425).
Table 3-15. GPIO Header 2 Pin Description – J402
Pin NumberPin on GPIO HeaderPin Description of GPIO HeaderPin on WFI32E02 Module(1)(2)
J402-1AN0/RPB0GPIOAN0/RPB0/RB0
J402-2SQID3/RPC1GPIOSQID3/RPC1/RC1
J402-3USBID/AN2/CVD2/CVDR2/CVDT5/RPB2GPIOUSBID/AN2/CVD2/CVDR2/CVDT5/RPB2/RB2
J402-4SQICS0/RPA0GPIOSQICS0/RPA0/RA0
J402-5SQID2/RPC2GPIOSQID2/RPC2/RC2
J402-6PGC2/AN4/CVD4/CVDR4/CVDT3/RPB4GPIOPGC2/AN4/CVD4/CVDR4/CVDT3/RPB4/RB4
J402-7SQICLK/RPC5GPIOSQICLK/RPC5/RC5
J402-8SQID0/RPC4GPIOSQID0/RPC4/RC4
J402-9

SCK1/RPC6

GPIO

SCK1/RPC6/RC6

J402-10SPI1CS/RPA1GPIOSPI1CS/RPA1/RA1
J402-11SDO1/RPC8GPIOSDO1/RPC8/RC8
J402-12PGD2/AN5/CVD5/CVDR5/CVDT2/RTCC/RPB5GPIOPGD2/AN5/CVD5/CVDR5/CVDT2/RTCC/RPB5/RB5
J402-13SDI1/RPC7GPIOSDI1/RPC7/RC7
J402-14GNDGroundGND
Note:
  1. These are PPS pins that can be configured for any of the supported peripheral functions based on the end user application.
  2. For more details on the WFI32E02 pins, refer to the PIC32MZ W1 MCU and WFI32 Module with Wi-Fi and Hardware-Based Security Accelerator Data Sheet (DS70005425).