2.7.3 TXMode (buffered)
The ATA8510/15 offers a number of convenience functions for a telegram transmission in TXMode(buffered). A typical telegram structure is shown in Telegram Structure.
Two hardware FIFOs, a 32-byte data FIFO (DFIFO) and a 16-byte support FIFO (SFIFO) are available for storing transmission data. When using the symbol-based SFIFO, a de-synchronization signal of variable structure and length can be generated, followed by a wide range of preamble signals.
The DFIFO is designated to hold the payload data of the telegram. An automatic Manchester coder with selectable polarity and data order can be enabled. If required, a CRC checksum with a freely configurable 4-, 8- or 16-bit polynomial can be appended to the data payload.
The software starts the TX modulator as soon as the configured start-fill levels for both SFIFO and DFIFO are reached.
These levels can be configured separately for path A and path B of each service in the eepServices.txSetPathx[1:0] EEPROM variable.
- SFIFO fill level
| Address Service0 | Name | Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
|---|---|---|---|---|---|---|---|---|---|
| 0x0102 | txSetPathA[1] | TXMODA | ASKshapingenable | — | StartPreambleFillLevelA[4:0] | ||||
| 0x0104 | txSetPathB[1] | TXMODB | ASKshapingenable | — | StartPreambleFillLevelB[4:0] | ||||
- DFIFO fill level
| Address Service0 | Name | Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
|---|---|---|---|---|---|---|---|---|---|
| 0x0101 | txSetPathA[0] | GAUS | PREE | StartTxFillLevelA[5:0] | |||||
| 0x0103 | txSetPathB[0] | GAUS | PREE | StartTxFillLevelB[5:0] | |||||
If the FIFOs are already filled up to or above the configured start fill levels before TXMode(buffered) is started, transmission begins immediately after the TXMode start-up. The carrier is switched on (FSK mode only) and the symbol time counter is started. The first data bit is sent after the counter elapses, which results in a delay of one symbol period.
The TX modulator comprises an internal hardware state machine. At first, the fill level of the SFIFO is checked. If there is data available in the FIFO, it is processed as described in Support FIFO Processing until the SFIFO is empty. The SFIFO can be refilled during processing by using the “Write TX Preamble FIFO” SPI command.
Next, the fill level of the DFIFO is checked. If there is data available in the DFIFO, it is processed as described in Data FIFO Processing until the DFIFO is empty or the payload length limit is reached. The DFIFO can be refilled during processing by using the “Write TX FIFO” SPI command. An optional CRC checksum can be appended (see CRC Handling).
Finally, a stop sequence of up to eight symbols can be transmitted, such as to generate a Manchester code violation. For more information, see Stop Sequence Processing.
The end-of-transmission options are discussed in End of Transmission.