13.12.1 Control
| Name: | CTRL |
| Offset: | 0x0000 |
| Reset: | 0x00 |
| Property: | PAC Write-Protection |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| Reserved | Reserved | CE | Reserved | CRC | SWRST | ||||
| Access | - | - | R/W | - | R/W | W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 |
Bit 7 – Reserved
Must be set to 0.
Bit 6 – Reserved
Must be set to 0.
Bit 4 – CE Chip-Erase
Writing a '0' to this bit has no effect.
Writing a '1' to this bit starts the Chip-Erase operation.
Note: The chip erase operation can only
be performed if the Chip Erase Hard Lock has not been set (STATUSB:CEHL=0). Once
STATUSB:CEHL=1, the chip erase feature becomes permanently disabled.
Bit 3 – Reserved
Must be set to 0.
Bit 2 – CRC 32-bit Cyclic Redundancy Check
Writing a '0' to this bit has no effect.
Writing a '1' to this bit starts the cyclic redundancy check algorithm.
Bit 0 – SWRST Software Reset
Writing a '0' to this bit has no effect.
Writing a '1' to this bit resets the module.