13.12.3 Status B

Name: STATUSB
Offset: 0x0002
Reset: x determined by Security Bit (SB) and Chip Erase Hard Lock (CEHL) bit configuration before reset
Property: -

Bit 76543210 
   CEHLHPEDCCD1DCCD0DBGPRESPROT 
Access RRRRRR 
Reset x1000x 

Bit 5 – CEHL Chip Erase Hard Lock status bit

Writing a '0' to this bit has no effect.

Writing a '1' to this bit has no effect.

Reading 1 means the debugger chip erase hard lock is permanently set. It is no more possible to perform a debugger chip erase.

Reading 0 means the debugger chip erase hard lock is not set and it is still possible to perform a debugger chip erase.

Bit 4 – HPE Hot-Plugging Enable

Writing a '0' to this bit has no effect.

Writing a '1' to this bit has no effect.

This bit is set when Hot-Plugging is enabled.

This bit is cleared when Hot-Plugging is disabled. This is the case when the SWCLK function is changed. Only a power-reset or a external reset can set it again.

Bits 2, 3 – DCCDx Debug Communication Channel x Dirty [x = 1..0]

Writing a '0' to this bit has no effect.

Writing a '1' to this bit has no effect.

This bit is set when DCCx is written.

This bit is cleared when DCCx is read.

Bit 1 – DBGPRES Debugger Present

Writing a '0' to this bit has no effect.

Writing a '1' to this bit has no effect.

This bit is set when a debugger probe is detected.

This bit is never cleared.

Bit 0 – PROT Protected

Writing a '0' to this bit has no effect.

Writing a '1' to this bit has no effect.

This bit is set at power-up when the device is protected (Meaning the Security Bit has been set).

This bit is reset at power-up when the device is not protected.